1. Field of the Invention
The present invention relates generally to RF devices and networks, and particularly to RF impedance transformation networks.
2. Technical Background
As new RF spectrum becomes available to meet the ever increasing demand for wireless services market forces are requiring base stations to support a wider range of frequency bands. With respect to this requirement, the base station power amplifier as emerged as one of the key components. In particular, the problem of increasing the efficiency of linear power amplifiers for high peak-to-average ratio (PAR) signals in a linear power amplifier is one of the issues facing power amplifier manufacturers. After a suitable wideband power amplifier design is established, another design goal is develop generic platforms for the power amplifier design such that it can be deployed in a variety products with minimal or no change. As the added benefit of faster design cycles and lower development costs. It turns out that Doherty power amplifiers have been widely adopted as a linear amplifier configuration with improved efficiency for high PAR signals for a variety of reasons.
Referring to FIG. 1, in general, a Doherty power amplifier architecture 1 includes two amplifiers, a main amplifier 2 and a peak amplifier 3. The input signal to Doherty amplifier 1 is a differential signal that includes in-phase (I) and quadrature (Q) components. Briefly stated, the quadrature component is 90° out of phase with respect to the in-phase component. The main, or carrier amplifier 2, as it is sometimes called, amplifies the in-phase component (I). The peak amplifier 3 amplifies the quadrature component (Q) of the input signal. The main amplifier 2 is typically implemented as a Class B amplifier that operates over approximately 180° of an input signal's sinusoidal period. The peak amplifier 3, on the other hand, is implemented as a Class C amplifier that is biased to operate in only a portion of the operating region of the main amplifier 2. Thus, only the carrier amplifier 2 is operating in the “back off” mode, when the input signal power is relatively low; and the output impedance of the peak amplifier 3 is very high (e.g., 1000 Ohms).
The output of the main amplifier 2 is directed to an inverting impedance matching network 4, whereas the output of the peak amplifier is provided to non-inverting impedance matching network 5. The inverting matching networks 4 and non-inverting matching network 5 are the main amplifier's output matching network and the peak amplifier's output matching network, respectively. The inverting impedance matching network 4 transforms from an output impedance (Z1) at one end (i.e., amplifier output 2) to a desired impedance (Z2) at the other end (combining node 6) by keeping the product of Z1 and Z2 constant. For example, the output impedance Z1/2 at would be transformed to 2*Z2. A quarter-wavelength transmission line is a common example of an inverting impedance matching network. As mentioned above, the peak amplifier 3 is coupled to the non-inverting impedance matching network 5 which is configured to transform impedance Z3 at one end to Z4 at the other end by keeping the ratio of Z3 and Z4 constant. For instance, 2*Z3 at one end would be transformed to 2*Z4 at the other end. One common example of a non-inverting impedance matching network includes two quarter-wavelength transmission lines. The reader should note that the subscripts (1, 2, 3, and 4) used with the various impedances (Z) in the above explanation are not meant to imply any impedance values, they are merely used as a mean to distinguish the various ends of the impedance networks. In the above description the reader should also note that the power amplifiers (2, 3) are treated as pure power sources, whereas the matching networks (4, 5) are deemed to include packaging, parasitic capacitors, and bias circuitry.
As mentioned above, when the amplifier is operating in maximum power mode, the (I, Q) signals are amplified by main and peak amplifiers before traversing their respective impedance matching networks (4, 5). The (I, Q) signals of course have the required phase and amplitude relationships, and summed at the combining node 6. The resultant common mode signal is directed into the output impedance transforming network 7. When Doherty amplifier 1 is operating in back off mode, the peak amplifier 3 is OFF and presents a high output impedance. The non-inverting impedance 5 matching network transforms the peak amplifier 3 path to a high impedance at the combining node. And the same time, the inverting impedance matching network 4 performs the load modulation by supplying the main amplifier 2 with a high impedance load. Accordingly, high efficiency is obtained in amplifier back off mode.
Referring to FIG. 2, an example of a conventional Doherty amplifier 1 is shown that includes the three matching networks described above. The inverting impedance network includes quarter-wavelength transmission lines TL1, Tl10 and TL5. The non-inverting matching network is includes quarter-wavelength transmission lines TL4 and TL12. After the combiner node, the output network includes a single quarter-wave transmission line TL11. The overall bandwidth of the Doherty amplifier 1 is limited by the frequency response of the three matching networks (4, 5 and 7). Conventional Doherty amplifiers are considered to be narrow bandwidth devices.
Referring to FIG. 3, a chart illustrating the performance of the conventional Doherty architecture shown in FIG. 2. The return loss of the conventional Doherty architecture in the back off mode (low power) only has a bandwidth between 1950 MHz-2050 MHz at about −20 dB return loss. Thus, the bandwidth is approximately 100 MHz at 2000 MHz and the relative bandwidth is of 5%. This is very narrow indeed.
There are several approaches that have been considered to improve the bandwidth of the conventional Doherty amplifier. These approaches typically involve decreasing the impedance at the combining node. The bandwidth improvement comes as the result of three things. First, designing the wideband inverting and non-inverting matching networks proves to be very difficult when the impedance transforming ratio is high. The bandwidth of inverting and non-inverting impedance matching networks is much easier to achieve when the impedance transforming ratio is relatively low. Second, when the Doherty amplifier is the back off mode, the undesired frequency dispersion in the peaking amplifier path has less impact on the bandwidth when it is coupled to a lower impedance node. Last, the effect of parasitical capacitances and bias networks are much smaller when transistors are matched to lower impedances. However, the burden of the required impedance transforming is shifted to the final output impedance transforming matching network after the combining node. In this case, a large impedance transforming ratio that exhibits wideband performance is required.
What is needed therefore is a Doherty network that overcomes the drawbacks associated with conventional systems. Moreover, a system is needed that provides more favorable efficiency and bandwidth choices that are achievable in conventional Doherty amplifiers.